Principal Analog IC Design Engineer


Plymouth, United Kingdom
Job Type

This company provides compelling embedded subsystem IP solutions for Process, Voltage & Temperature (PVT) monitoring, targeting advanced node CMOS technologies. Their in-chip sensing solutions support the semiconductor design community’s demands for increased device reliability, lifetime and enhanced performance optimization, enabling schemes such as DVFS, AVS and power management control systems.

They provide excellent support for IP application, integration and device test during production and their high-performance analog and mixed-signal IP designs are delivered into ASIC and System on Chip (SoC) technologies within the Automotive, AI, IoT, Datacenter, DTV, HPC and Networking sectors. As part of their expanding engineering team, this role will involve technical leadership within engineering, as well as hands on design, simulation and verification of full custom analog circuits and IP blocks, on some of the most advanced semiconductor nodes available.

Required Skills and Experience

  • Oversee peer reviewing process
  • Provide technical support to junior engineers
  • Promote design best practices and drive improvements in quality
  • Provide technical leadership for members of the analog design team
  • Hands on design, simulation and verification of analog block designs
  • Support the CTO with planning and management of engineering projects and roadmap development
  • Provide expert support to customers

Required Experience

  • Proven track record of delivering tasks on schedule
  • 10+ years of experience in analog/mixed-signal IC design as a minimum
  • Degree (or equivalent qualification) in electronic engineering
  • Good communication and interpersonal skills
  • Good knowledge of Cadence tools

If successful you will be joining a dedicated and highly innovative team of Analog IC Design specialists, you will be working on Analog/Mixed Signal IC Design, simulation and verification of full custom Analog cells, sub blocks and IP blocks for advanced node CMOS technologies (from 65nm down to 28nm and below).

Due to the nature of this role we will be considering candidate relocations to include VISA support and lengthy notice periods will not necessarily be a concern. If you have the relevant experience and are currently looking for a new challenge, then please submit an up to date CV by using the ‘apply’ button below. 

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